Flash memories are popular memory storage devices because they store information in the absence of continuous power and are capable of being constructed in a very compact form. Flash memory is typically constructed by fabricating a plurality of floating-gate transistors in a silicon substrate. A floating-gate transistor is capable of storing electrical charge on a separate gate electrode known as a floating gate that is separated by a thin dielectric layer from a control-gate electrode. Generally speaking, data is stored in a non-volatile memory device by the storage of an electrical charge in the floating gate.
Flash memories are in the form of a memory array that includes rows and columns of flash transistors, with each transistor being referred to as a memory cell that includes a control gate, a drain and a source. The control gates of the memory cells in each row of a sector are typically electrically interconnected to form wordlines such that a wordline decoder can direct a plurality of operational voltages to the wordlines. The drains of the memory cells in each column of a sector are typically electrically interconnected to form bitlines such that a bitline decoder directs a plurality of operational voltages to the bitlines. Generally, the sources of the memory cells in a sector are electrically interconnected to form a common sourceline and are controlled by a sourceline controller. As known in the art, the memory array is subdivided into sectors containing rows and columns of memory cells.
To program a respective memory cell in the flash memory, the control gate (wordline) and drain (bitline) of the memory cell to be programmed are raised to predetermined programming voltages and the source is grounded. When the predetermined programming voltages are removed, a negative charge on the floating gate is maintained. In contrast to the programming procedure, flash memory devices are typically bulk-erased, so that all of the memory cells on a predetermined number of bitlines and wordlines are simultaneously erased by applying predetermined voltages to the bitlines, the wordlines and the sourceline.
In order to read a particular memory cell, a voltage called the threshold voltage of the cell is measured to determine if the cell is in a charged (programmed) or an uncharged (unprogrammed) state. Memory cells are read by applying a predetermined voltage to the wordline and the bitline, grounding the sourceline and then sensing the current on the bitline, If the memory cell is programmed, the threshold voltage will be relatively high and the bitline current will be zero, or at least relatively low, when the predetermined voltage is applied between the control gate and the drain of the memory cell. If the memory cell is not programmed, the threshold voltage will be relatively low and the bitline current will be relatively high when the predetermined voltage is applied.
During fabrication of the flash memory, functional testing is performed to verify proper operation and to characterize the memory cells to determine the threshold voltage in an un-programmed and a programmed state. Characterization of the memory cells generally involves verifying the operating margins and determining the current-to-voltage relationship of the un-programmed and programmed memory cells. As known in the art, the current-to-voltage characterization of the memory cells depends on parameters established during fabrication. These parameters include the geometry (physical dimensions) of the memory cells, the doping concentrations of the source and drain diffusion regions and oxide thickness.
When functional testing is initiated to determine the current-to-voltage characteristic of a selected memory cell, predetermined voltages are applied to the bitline decoder, the wordline decoder and the sourceline controller. The selected memory cell is then read by sensing any bitline current that is present due to the predetermined voltages applied. The current-to-voltage characteristic is typically developed by varying the predetermined voltage applied to the wordline decoder in a predetermined range while sensing the bitline current of the selected memory cell.
In the prior art methods and systems of performing testing to characterize the current-to-voltage characteristic of the memory cells, a known problem occurs when the predetermined range of voltage applied to the wordline decoder includes magnitudes of voltage that are less than a supply voltage (Vcc). When a magnitude of voltage less than the supply voltage (Vcc) is supplied to a selected wordline decoder electrically connected with the selected memory cell, the voltage is also applied to unselected wordline decoders electrically connected with unselected memory cells. The unselected wordline decoders are damaged if a forward bias condition is created within the unselected wordline decoders. The forward bias condition is created when the unselected wordline decoders are exposed to magnitudes of voltage that are less than the supply voltage (Vcc) and the supply voltage (Vcc) at the same time.
To that end, a need exists for methods and systems of applying a predetermined range of voltage to a plurality of wordline decoders that allow the selected wordline decoder to transfer the voltage to the wordlines while not damaging the unselected wordline decoders that are exposed to the predetermined range of voltage.